Microprocessors, such as a CISC-based microprocessor 102, are at the heart of all personal computers. See FIG. 1. When power 104 and memory 106 are added to the CISC-based microprocessor 102, all the pieces required for forming a computer are present. The CISC-based microprocessor 102 accomplishes tasks by obeying instructions that are given to it. Instructions are expressions written in an artificial language, such as a programming language. Early microprocessors used only simple instructions because the cost of microelectronic hardware capable of carrying out complex instructions was very high. As these costs decreased over time, more complicated instructions became possible. Complex instructions (single instructions that specify multiple microprocessor operations) can save time because they make it unnecessary for the computer to retrieve additional instructions. For example, if seven operations are combined into one instruction, then six of the steps that fetch instructions are eliminated and the microprocessor spends less time processing that operation. Microprocessors that combine several instructions into a single operation are called complex instruction set computers (CISC).
The CISC-based microprocessor 102 uses registers to store results of executed instructions. Each register is a set of bits of high-speed memory within the CISC-based microprocessor 102 used to hold data for a particular purpose. Each register is referred to in assembly language programs by a name such as AX (the register that contains the results of arithmetic operations in a computer processor such as an INTEL® 80×86 processor) or SP (the register that contains the memory address at the top of the stack in various CISC-based microprocessors). Each register, in essence, is shared memory between components of the CISC-based microprocessor 102. Using registers as shared memory, one component performs a specific operation and stores the result of the specific operation in a register. In a sequential fashion, another component may then access the same register to obtain the result in the performance of other operations.
Such a sequential execution of operations allows the components of the CISC-based microprocessor 102 to appear as if they were synchronous in their communication. Nearly all instructions in programs, such as in a CISC-based middleware 108, are designed to execute sequentially. Hardware interrupts available with the CISC-based microprocessor 102 can be used as a way to add asynchrony and thereby concurrent execution of operations. A hardware interrupt is a request for service from the CISC-based microprocessor 102, generated either externally by a hardware device, such as a disk drive or an input/output port, or internally by the CISC-based microprocessor 102 itself. External hardware interrupts are used for such situations as a character received from a port and needing to be processed, a disk write ready to transfer a block of data, or a tick of the system timer. Internal hardware interrupts occur when a program attempts an impossible action, such as accessing an unavailable address or dividing by zero. Due to the divergent architecture (synchronous nature of the microprocessor components and the asynchronous nature of hardware interrupts), just one programming error in an interrupt handler may deadlock the CISC-based microprocessor 102 or corrupt data in a pathologic, rarely reproducible manner.
π-calculus programs 110 can bring desired asynchrony and parallelism to the synchronous and sequential execution design of CISC-based middleware 108 and the CISC-based microprocessor 102. π-calculus is a mathematical language for describing processes in interactive, concurrent systems. The core of π-calculus consists of a system of independent, parallel processes that communicate via links. The possibilities of communication for a process with other processes depends on its knowledge of various different links. Links may be restricted so that only certain processes can communicate on them.
Although π-calculus can bring much needed asynchrony and parallelism to computing, there are significant shortcomings. π-calculus places great emphasis on pure names, each of which is defined to be only a bit pattern, and not structured information. π-calculus and its variants lack a tolerance for the passage of structured data on named links. To create a new name, such as the name X, a ν operator is used in π-calculus. For example, the mathematical term (νX) P denotes the creation of the name X, and its scope is restricted to the process P. Components of the process P can use X to interact with one another, but not with other processes. Consider the mathematical structurally congruent rule (νX)(νX)P≡(νX)P. The term (νX) is defined as an operation requiring memory allocation using functions such as malloc( ). Suppose there is only sufficient memory remaining in a computing system for one invocation of the term (νX). If such is the case, the term (νX) on the right-hand side of the structurally congruent rule processes without failure. Not so with the term (νX) (νX) P on the left-hand side of the structurally congruent rule because the second invocation of (νX) will cause a memory fault.
Another problem with π-calculus is the mathematical notion of replication !P. π-calculus provides as a primitive of a language the replication !P. The term !P can be interpreted to mean an infinite composition of processes P running in parallel with one another. While !P may be theoretically transcendental, it causes problems in practical concretization. Microprocessors are creatures of finite resources, such as memory and bandwidth. While π-calculus programs do add desired asynchrony, they do not recognize that microprocessors on which these π-calculus programs execute are resource bound.
In sum, CISC-based microprocessors may not work well for asynchronous systems that require concurrent and parallel computation, namely large-scale computer systems, such as the Internet, that are decentralized. The traditional sequential execution architecture may not be suited to the need for concurrent execution of operations. While π-calculus provides some remedies in bringing asynchrony and parallelism, some of its mathematical primitives are incompatible with computing devices that have finite resources. Without solutions to the problems discussed above, users may eventually no longer trust a computing system to provide a desired computing experience, and demand for computer systems will diminish over time in the marketplace. Thus, there is a need for better integrated circuits and programming languages for facilitating better asynchrony, concurrency, and parallelism while avoiding or reducing the foregoing and other problems associated with existing CISC-based microprocessors and π-calculus.